Forum : ARM
Original Post
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March 28, 2007 - 8:19pm
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We are working with the RLink Pro and REva 2.0 as well as REva 2.1 EVal boards. The daughterboard is the STR750. Thanks in advance |
Hi,
Have you detached the starter RLink that was on the REva before using the Pro?
If not, then you should do it because it can lead to conflicts.
What do you mean by "explicitly erase the flash"? Are you doing this through RFlasher?
Have you selected all the sectors in the programming section of the debugging options?
If not, can you please check that the data problems that you see are not located in a sector that you deactivated.
It would be easier if we could have your project here. (or any other project showing the problem, but we need it precompiled and complete with source files, include files, listing files, etc.) Please send it to "support@raisonance.com"
Best Regards,
Vincent
Explicitely means I erase the flash in Debug-Options (all sectors checked).
And now we are on the "real" hardware, not REva anymore.
We finally have found the solutions for out problem:
since the JTAG interface cannot halt the ARM right out of reset the will be some code executed.
In our case this is the bootloader. The bootloader enables the watchdog.
So, after a very short while the ARM core is halted by the JTAG interface and starts to erase or program, and of course
since the watchdog doesnt get reset this will lead to a watchdog reset. Voila!
Our workaround: we enable the watchdog in the bootloader NOT, if there is a "magic" value in a non initialized RAM location.
So prior erasing/programming the application via JTAG we set this special value and execute the erase/program afterwards.
Just in case somebody stumbles into a similar situation.
Alexander Mueller