Topic : Ride7 Evaluation file size ?

Forum : ST7/STM8

Original Post
Post Information Post
November 3, 2009 - 6:13am
Guest

Hi all,

I'm working on the firmware for STM8S103K3 and I'd like to set up the PWM output on TIM1 and I tried one of the example from the Lib. When I compiled, Ride7 send me an error " Fatal Error C200 in Line 922 of C:\Program files\Raisonance\Ride\Examples\STM8\5601058\stm8s_tim1.c : evaluation file size has reached (1024 byes)"

Why'd stm8s_tim1.c has to do with the file size ? since I only compile the main.c file ? please help, how to resolve this issue.

This is the code I wrote : 

/* Includes ------------------------------------------------------------------*/
#include "stm8s.h"
#include "stm8s_tim1.h"


/*I/Os configuration */

#define Output (GPIOB)
#define Dimmer_Enable (GPIO_PIN_3)
#define Dimmer_Out (GPIO_PIN_2)
#define Dimmer_Stat (GPIO_PIN_1)

/*Timer 1 definition*/
#define CCR1_Val ((u16)2047) 
#define CCR2_Val ((u16)1535) 
#define CCR3_Val ((u16)1023) 
#define CCR4_Val ((u16)511) 


u8 Dimmer_val = 0x0 ; 


/* Public functions ----------------------------------------------------------*/

void main(void)
{

  /*Initialize I/Os in Output Mode */
  GPIO_Init(Output, (Dimmer_Out|Dimmer_Stat), GPIO_MODE_OUT_PP_LOW_FAST);
  /*Initialize I/Os in input Mode- Pull up without interupt */
  GPIO_Init(Output, Dimmer_Enable, GPIO_MODE_IN_PU_NO_IT);
  /*TIM1 Peripheral Configuration */
  TIM1_DeInit();
  /* Time Base Configuration */
  /* TIM1_Period = 4095
     TIM1_Prescaler = 0
     TIM1_CounterMode = TIM1_COUNTERMODE_UP
     TIM1_RepetitionCounter = 0 */
  
   TIM1_TimeBaseInit(0, TIM1_COUNTERMODE_UP, 4095, 0);

  /* Channel 1 Configuration in PWM mode */
  /* TIM1_OCMode = TIM1_OCMode_PWM2
     TIM1_OutputState = TIM1_OUTPUTSTATE_ENABLE
     TIM1_OutputNState = TIM1_OUTPUTNSTATE_ENABLE
     TIM1_Pulse  =  CCR1_Val
     TIM1_OCPolarity = TIM1_OCPOLARITY_LOW
     TIM1_OCNPolarity = TIM1_OCNPOLARITY_HIGH
     TIM1_OCIdleState = TIM1_OCIDLESTATE_SET
     TIM1_OCNIdleState = TIM1_OCIDLESTATE_RESET */
     
   TIM1_OC1Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR1_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); 
   
   /*TIM1_Pulse = CCR2_Val */
   
   TIM1_OC2Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR2_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); 
   
   /*TIM1_Pulse = CCR3_Val */
   
   TIM1_OC3Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR3_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); 
   
   /*TIM1_Pulse = CCR4_Val */
   
   //TIM1_OC4Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR4_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); 
   
   /* TIM1 Counter enable */
   
   TIM1_Cmd(ENABLE);
   
   /* TIM1 Main Output Enable */
   
   TIM1_CtrlPWMOutputs(ENABLE);
     
     

  while (1)
  {
   Dimmer_val = GPIO_ReadInputPin(Output, Dimmer_Enable);
   if (Dimmer_val == 1)
   { 
    GPIO_WriteHigh(Output, Dimmer_Out|Dimmer_Stat); // set Dimmer output high
   }
   else
   {
    GPIO_WriteLow(Output, Dimmer_Out|Dimmer_Stat); // set Dimmer output low
   }
  }

}
Replies
Post Information Post
+1
0
-1
November 3, 2009 - 9:02am
Raisonance Support Team

Hi Snake,

Can you try to preprocess your file (using the PREPRINT directive) and post it here? I do not see why stm8s_tim1.c enters the compilation game if you just compile main.c.

Bruno
+1
0
-1
November 3, 2009 - 8:37pm
Guest

Bruno,

I tried the Preprint directive at the beginning of my main.c file and it did not work. I placed "Preprint("C:\Program Files\Raisonance\Ride\Examples\STM8\5601058\main.i")" at the beginning of my main.c file.

The path of my main.c is C:\Program Files\Raisonance\Ride\Examples\STM8\5601058\main.c
+1
0
-1
November 4, 2009 - 11:02am
Raisonance Support Team

You need to add #pragma in front of the directive if you put it in the C file, as follows:
#pragma preprint("C:\Program Files\Raisonance\Ride\Examples\STM8\5601058\main.i")

And the output path must exist (which is your case)

Regards,
Bruno
+1
0
-1
November 6, 2009 - 5:49am
Guest

Bruno,

This is the preprocess file 

typedef signed long s32 ;
typedef signed short s16 ;
typedef signed char s8 ;
typedef signed long const sc32 ;
typedef signed short const sc16 ;
typedef signed char const sc8 ;
typedef volatile signed long vs32 ;
typedef volatile signed short vs16 ;
typedef volatile signed char vs8 ;
typedef volatile signed long const vsc32 ;
typedef volatile signed short const vsc16 ;
typedef volatile signed char const vsc8 ;
typedef unsigned long u32 ;
typedef unsigned short u16 ;
typedef unsigned char u8 ;
typedef unsigned long const uc32 ;
typedef unsigned short const uc16 ;
typedef unsigned char const uc8 ;
typedef volatile unsigned long vu32 ;
typedef volatile unsigned short vu16 ;
typedef volatile unsigned char vu8 ;
typedef volatile unsigned long const vuc32 ;
typedef volatile unsigned short const vuc16 ;
typedef volatile unsigned char const vuc8 ;
typedef enum {
    FALSE = 0 , TRUE = ! FALSE }
bool ;
typedef enum {
    RESET = 0 , SET = ! RESET }
FlagStatus , ITStatus , BitStatus ;
typedef enum {
    DISABLE = 0 , ENABLE = ! DISABLE }
FunctionalState ;
typedef enum {
    ERROR = 0 , SUCCESS = ! ERROR }
ErrorStatus ;
typedef struct GPIO_struct {
    vu8 ODR ;
    vu8 IDR ;
    vu8 DDR ;
    vu8 CR1 ;
    vu8 CR2 ;
    }
GPIO_TypeDef ;
typedef struct ADC2_struct {
    vu8 CSR ;
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 RESERVED ;
    vu8 DRH ;
    vu8 DRL ;
    vu8 TDRH ;
    vu8 TDRL ;
    }
ADC2_TypeDef ;
typedef struct AWU_struct {
    vu8 CSR ;
    vu8 APR ;
    vu8 TBR ;
    }
AWU_TypeDef ;
typedef struct BEEP_struct {
    vu8 CSR ;
    }
BEEP_TypeDef ;
typedef struct CLK_struct {
    vu8 ICKR ;
    vu8 ECKR ;
    u8 RESERVED ;
    vu8 CMSR ;
    vu8 SWR ;
    vu8 SWCR ;
    vu8 CKDIVR ;
    vu8 PCKENR1 ;
    vu8 CSSR ;
    vu8 CCOR ;
    vu8 PCKENR2 ;
    vu8 CANCCR ;
    vu8 HSITRIMR ;
    vu8 SWIMCCR ;
    }
CLK_TypeDef ;
typedef struct TIM1_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 SMCR ;
    vu8 ETR ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 SR2 ;
    vu8 EGR ;
    vu8 CCMR1 ;
    vu8 CCMR2 ;
    vu8 CCMR3 ;
    vu8 CCMR4 ;
    vu8 CCER1 ;
    vu8 CCER2 ;
    vu8 CNTRH ;
    vu8 CNTRL ;
    vu8 PSCRH ;
    vu8 PSCRL ;
    vu8 ARRH ;
    vu8 ARRL ;
    vu8 RCR ;
    vu8 CCR1H ;
    vu8 CCR1L ;
    vu8 CCR2H ;
    vu8 CCR2L ;
    vu8 CCR3H ;
    vu8 CCR3L ;
    vu8 CCR4H ;
    vu8 CCR4L ;
    vu8 BKR ;
    vu8 DTR ;
    vu8 OISR ;
    }
TIM1_TypeDef ;
typedef struct TIM2_struct {
    vu8 CR1 ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 SR2 ;
    vu8 EGR ;
    vu8 CCMR1 ;
    vu8 CCMR2 ;
    vu8 CCMR3 ;
    vu8 CCER1 ;
    vu8 CCER2 ;
    vu8 CNTRH ;
    vu8 CNTRL ;
    vu8 PSCR ;
    vu8 ARRH ;
    vu8 ARRL ;
    vu8 CCR1H ;
    vu8 CCR1L ;
    vu8 CCR2H ;
    vu8 CCR2L ;
    vu8 CCR3H ;
    vu8 CCR3L ;
    }
TIM2_TypeDef ;
typedef struct TIM3_struct {
    vu8 CR1 ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 SR2 ;
    vu8 EGR ;
    vu8 CCMR1 ;
    vu8 CCMR2 ;
    vu8 CCER1 ;
    vu8 CNTRH ;
    vu8 CNTRL ;
    vu8 PSCR ;
    vu8 ARRH ;
    vu8 ARRL ;
    vu8 CCR1H ;
    vu8 CCR1L ;
    vu8 CCR2H ;
    vu8 CCR2L ;
    }
TIM3_TypeDef ;
typedef struct TIM4_struct {
    vu8 CR1 ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 EGR ;
    vu8 CNTR ;
    vu8 PSCR ;
    vu8 ARR ;
    }
TIM4_TypeDef ;
typedef struct TIM5_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 SMCR ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 SR2 ;
    vu8 EGR ;
    vu8 CCMR1 ;
    vu8 CCMR2 ;
    vu8 CCMR3 ;
    vu8 CCER1 ;
    vu8 CCER2 ;
    vu8 CNTRH ;
    vu8 CNTRL ;
    vu8 PSCR ;
    vu8 ARRH ;
    vu8 ARRL ;
    vu8 CCR1H ;
    vu8 CCR1L ;
    vu8 CCR2H ;
    vu8 CCR2L ;
    vu8 CCR3H ;
    vu8 CCR3L ;
    }
TIM5_TypeDef ;
typedef struct TIM6_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 SMCR ;
    vu8 IER ;
    vu8 SR1 ;
    vu8 EGR ;
    vu8 CNTR ;
    vu8 PSCR ;
    vu8 ARR ;
    }
TIM6_TypeDef ;
typedef struct I2C_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 FREQR ;
    vu8 OARL ;
    vu8 OARH ;
    vu8 RESERVED1 ;
    vu8 DR ;
    vu8 SR1 ;
    vu8 SR2 ;
    vu8 SR3 ;
    vu8 ITR ;
    vu8 CCRL ;
    vu8 CCRH ;
    vu8 TRISER ;
    vu8 RESERVED2 ;
    }
I2C_TypeDef ;
typedef struct ITC_struct {
    vu8 ISPR1 ;
    vu8 ISPR2 ;
    vu8 ISPR3 ;
    vu8 ISPR4 ;
    vu8 ISPR5 ;
    vu8 ISPR6 ;
    vu8 ISPR7 ;
    vu8 ISPR8 ;
    }
ITC_TypeDef ;
typedef struct EXTI_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    }
EXTI_TypeDef ;
typedef struct FLASH_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 NCR2 ;
    vu8 FPR ;
    vu8 NFPR ;
    vu8 IAPSR ;
    vu8 RESERVED1 ;
    vu8 RESERVED2 ;
    vu8 PUKR ;
    vu8 RESERVED3 ;
    vu8 DUKR ;
    }
FLASH_TypeDef ;
typedef struct OPT_struct {
    vu8 OPT0 ;
    vu8 OPT1 ;
    vu8 NOPT1 ;
    vu8 OPT2 ;
    vu8 NOPT2 ;
    vu8 OPT3 ;
    vu8 NOPT3 ;
    vu8 OPT4 ;
    vu8 NOPT4 ;
    vu8 OPT5 ;
    vu8 NOPT5 ;
    vu8 RESERVED1 ;
    vu8 RESERVED2 ;
    vu8 OPT7 ;
    vu8 NOPT7 ;
    }
OPT_TypeDef ;
typedef struct IWDG_struct {
    vu8 KR ;
    vu8 PR ;
    vu8 RLR ;
    }
IWDG_TypeDef ;
typedef struct WWDG_struct {
    vu8 CR ;
    vu8 WR ;
    }
WWDG_TypeDef ;
typedef struct RST_struct {
    vu8 SR ;
    }
RST_TypeDef ;
typedef struct SPI_struct {
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 ICR ;
    vu8 SR ;
    vu8 DR ;
    vu8 CRCPR ;
    vu8 RXCRCR ;
    vu8 TXCRCR ;
    }
SPI_TypeDef ;
typedef struct SWIM_struct {
    vu8 CSR ;
    vu8 DR ;
    }
SWIM_TypeDef ;
typedef struct UART1_struct {
    vu8 SR ;
    vu8 DR ;
    vu8 BRR1 ;
    vu8 BRR2 ;
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 CR3 ;
    vu8 CR4 ;
    vu8 CR5 ;
    vu8 GTR ;
    vu8 PSCR ;
    }
UART1_TypeDef ;
typedef struct UART2_struct {
    vu8 SR ;
    vu8 DR ;
    vu8 BRR1 ;
    vu8 BRR2 ;
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 CR3 ;
    vu8 CR4 ;
    vu8 CR5 ;
    vu8 CR6 ;
    vu8 GTR ;
    vu8 PSCR ;
    }
UART2_TypeDef ;
typedef struct UART3_struct {
    vu8 SR ;
    vu8 DR ;
    vu8 BRR1 ;
    vu8 BRR2 ;
    vu8 CR1 ;
    vu8 CR2 ;
    vu8 CR3 ;
    vu8 CR4 ;
    vu8 RESERVED ;
    vu8 CR6 ;
    }
UART3_TypeDef ;
typedef struct {
    vu8 MCR ;
    vu8 MSR ;
    vu8 TSR ;
    vu8 TPR ;
    vu8 RFR ;
    vu8 IER ;
    vu8 DGR ;
    vu8 PSR ;
    union {
        struct {
            vu8 MCSR ;
            vu8 MDLCR ;
            vu8 MIDR1 ;
            vu8 MIDR2 ;
            vu8 MIDR3 ;
            vu8 MIDR4 ;
            vu8 MDAR1 ;
            vu8 MDAR2 ;
            vu8 MDAR3 ;
            vu8 MDAR4 ;
            vu8 MDAR5 ;
            vu8 MDAR6 ;
            vu8 MDAR7 ;
            vu8 MDAR8 ;
            vu8 MTSRL ;
            vu8 MTSRH ;
            }
        TxMailbox ;
        struct {
            vu8 FR01 ;
            vu8 FR02 ;
            vu8 FR03 ;
            vu8 FR04 ;
            vu8 FR05 ;
            vu8 FR06 ;
            vu8 FR07 ;
            vu8 FR08 ;
            vu8 FR09 ;
            vu8 FR10 ;
            vu8 FR11 ;
            vu8 FR12 ;
            vu8 FR13 ;
            vu8 FR14 ;
            vu8 FR15 ;
            vu8 FR16 ;
            }
        Filter ;
        struct {
            vu8 F0R1 ;
            vu8 F0R2 ;
            vu8 F0R3 ;
            vu8 F0R4 ;
            vu8 F0R5 ;
            vu8 F0R6 ;
            vu8 F0R7 ;
            vu8 F0R8 ;
            vu8 F1R1 ;
            vu8 F1R2 ;
            vu8 F1R3 ;
            vu8 F1R4 ;
            vu8 F1R5 ;
            vu8 F1R6 ;
            vu8 F1R7 ;
            vu8 F1R8 ;
            }
        Filter01 ;
        struct {
            vu8 F2R1 ;
            vu8 F2R2 ;
            vu8 F2R3 ;
            vu8 F2R4 ;
            vu8 F2R5 ;
            vu8 F2R6 ;
            vu8 F2R7 ;
            vu8 F2R8 ;
            vu8 F3R1 ;
            vu8 F3R2 ;
            vu8 F3R3 ;
            vu8 F3R4 ;
            vu8 F3R5 ;
            vu8 F3R6 ;
            vu8 F3R7 ;
            vu8 F3R8 ;
            }
        Filter23 ;
        struct {
            vu8 F4R1 ;
            vu8 F4R2 ;
            vu8 F4R3 ;
            vu8 F4R4 ;
            vu8 F4R5 ;
            vu8 F4R6 ;
            vu8 F4R7 ;
            vu8 F4R8 ;
            vu8 F5R1 ;
            vu8 F5R2 ;
            vu8 F5R3 ;
            vu8 F5R4 ;
            vu8 F5R5 ;
            vu8 F5R6 ;
            vu8 F5R7 ;
            vu8 F5R8 ;
            }
        Filter45 ;
        struct {
            vu8 ESR ;
            vu8 EIER ;
            vu8 TECR ;
            vu8 RECR ;
            vu8 BTR1 ;
            vu8 BTR2 ;
            u8 Reserved1 [ 2 ] ;
            vu8 FMR1 ;
            vu8 FMR2 ;
            vu8 FCR1 ;
            vu8 FCR2 ;
            vu8 FCR3 ;
            u8 Reserved2 [ 3 ] ;
            }
        Config ;
        struct {
            vu8 MFMI ;
            vu8 MDLCR ;
            vu8 MIDR1 ;
            vu8 MIDR2 ;
            vu8 MIDR3 ;
            vu8 MIDR4 ;
            vu8 MDAR1 ;
            vu8 MDAR2 ;
            vu8 MDAR3 ;
            vu8 MDAR4 ;
            vu8 MDAR5 ;
            vu8 MDAR6 ;
            vu8 MDAR7 ;
            vu8 MDAR8 ;
            vu8 MTSRL ;
            vu8 MTSRH ;
            }
        RxFIFO ;
        }
    Page ;
    }
CAN_TypeDef ;
typedef struct CFG_struct {
    vu8 GCR ;
    }
CFG_TypeDef ;
typedef enum {
    GPIO_MODE_IN_FL_NO_IT = ( u8 ) 0b00000000 , GPIO_MODE_IN_PU_NO_IT = ( u8 ) 0b01000000 , GPIO_MODE_IN_FL_IT = ( u8 ) 0b00100000 , GPIO_MODE_IN_PU_IT = ( u8 ) 0b01100000 , GPIO_MODE_OUT_OD_LOW_FAST = ( u8 ) 0b10100000 , GPIO_MODE_OUT_PP_LOW_FAST = ( u8 ) 0b11100000 , GPIO_MODE_OUT_OD_LOW_SLOW = ( u8 ) 0b10000000 , GPIO_MODE_OUT_PP_LOW_SLOW = ( u8 ) 0b11000000 , GPIO_MODE_OUT_OD_HIZ_FAST = ( u8 ) 0b10110000 , GPIO_MODE_OUT_PP_HIGH_FAST = ( u8 ) 0b11110000 , GPIO_MODE_OUT_OD_HIZ_SLOW = ( u8 ) 0b10010000 , GPIO_MODE_OUT_PP_HIGH_SLOW = ( u8 ) 0b11010000 }
GPIO_Mode_TypeDef ;
typedef enum {
    GPIO_PIN_0 = ( ( u8 ) 0x01 ) , GPIO_PIN_1 = ( ( u8 ) 0x02 ) , GPIO_PIN_2 = ( ( u8 ) 0x04 ) , GPIO_PIN_3 = ( ( u8 ) 0x08 ) , GPIO_PIN_4 = ( ( u8 ) 0x10 ) , GPIO_PIN_5 = ( ( u8 ) 0x20 ) , GPIO_PIN_6 = ( ( u8 ) 0x40 ) , GPIO_PIN_7 = ( ( u8 ) 0x80 ) , GPIO_PIN_LNIB = ( ( u8 ) 0x0F ) , GPIO_PIN_HNIB = ( ( u8 ) 0xF0 ) , GPIO_PIN_ALL = ( ( u8 ) 0xFF ) }
GPIO_Pin_TypeDef ;
void GPIO_DeInit ( GPIO_TypeDef * GPIOx ) ;
void GPIO_Init ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef GPIO_Pin , GPIO_Mode_TypeDef GPIO_Mode ) ;
void GPIO_Write ( GPIO_TypeDef * GPIOx , u8 PortVal ) ;
void GPIO_WriteHigh ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef PortPins ) ;
void GPIO_WriteLow ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef PortPins ) ;
void GPIO_WriteReverse ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef PortPins ) ;
u8 GPIO_ReadInputData ( GPIO_TypeDef * GPIOx ) ;
u8 GPIO_ReadOutputData ( GPIO_TypeDef * GPIOx ) ;
BitStatus GPIO_ReadInputPin ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef GPIO_Pin ) ;
void GPIO_ExternalPullUpConfig ( GPIO_TypeDef * GPIOx , GPIO_Pin_TypeDef GPIO_Pin , FunctionalState NewState ) ;
typedef enum {
    I2C_DUTYCYCLE_2 = ( u8 ) 0x00 , I2C_DUTYCYCLE_16_9 = ( u8 ) 0x40 }
I2C_DutyCycle_TypeDef ;
typedef enum {
    I2C_ACK_NONE = ( u8 ) 0x00 , I2C_ACK_CURR = ( u8 ) 0x01 , I2C_ACK_NEXT = ( u8 ) 0x02 }
I2C_Ack_TypeDef ;
typedef enum {
    I2C_ADDMODE_7BIT = ( u8 ) 0x00 , I2C_ADDMODE_10BIT = ( u8 ) 0x80 }
I2C_AddMode_TypeDef ;
typedef enum {
    I2C_IT_ERR = ( u8 ) 0x01 , I2C_IT_EVT = ( u8 ) 0x02 , I2C_IT_BUF = ( u8 ) 0x04 }
I2C_IT_TypeDef ;
typedef enum {
    I2C_DIRECTION_TX = ( u8 ) 0x00 , I2C_DIRECTION_RX = ( u8 ) 0x01 }
I2C_Direction_TypeDef ;
typedef enum {
    I2C_FLAG_TXEMPTY = ( u16 ) 0x1080 , I2C_FLAG_RXNOTEMPTY = ( u16 ) 0x1040 , I2C_FLAG_STOPDETECTION = ( u16 ) 0x1210 , I2C_FLAG_HEADERSENT = ( u16 ) 0x1408 , I2C_FLAG_TRANSFERFINISHED = ( u16 ) 0x1404 , I2C_FLAG_ADDRESSSENTMATCHED = ( u16 ) 0x1302 , I2C_FLAG_STARTDETECTION = ( u16 ) 0x1401 , I2C_FLAG_WAKEUPFROMHALT = ( u16 ) 0x2120 , I2C_FLAG_OVERRUNUNDERRUN = ( u16 ) 0x2108 , I2C_FLAG_ACKNOWLEDGEFAILURE = ( u16 ) 0x2104 , I2C_FLAG_ARBITRATIONLOSS = ( u16 ) 0x2102 , I2C_FLAG_BUSERROR = ( u16 ) 0x2101 , I2C_FLAG_GENERALCALL = ( u16 ) 0x3010 , I2C_FLAG_TRANSMITTERRECEIVER = ( u16 ) 0x3004 , I2C_FLAG_BUSBUSY = ( u16 ) 0x3002 , I2C_FLAG_MASTERSLAVE = ( u16 ) 0x3001 }
I2C_Flag_TypeDef ;
typedef enum {
    I2C_ITPENDINGBIT_TXEMPTY = ( u16 ) 0x1080 , I2C_ITPENDINGBIT_RXNOTEMPTY = ( u16 ) 0x1040 , I2C_ITPENDINGBIT_STOPDETECTION = ( u16 ) 0x1210 , I2C_ITPENDINGBIT_HEADERSENT = ( u16 ) 0x1408 , I2C_ITPENDINGBIT_TRANSFERFINISHED = ( u16 ) 0x1404 , I2C_ITPENDINGBIT_ADDRESSSENTMATCHED = ( u16 ) 0x1302 , I2C_ITPENDINGBIT_STARTDETECTION = ( u16 ) 0x1401 , I2C_ITPENDINGBIT_WAKEUPFROMHALT = ( u16 ) 0x2120 , I2C_ITPENDINGBIT_OVERRUNUNDERRUN = ( u16 ) 0x2108 , I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE = ( u16 ) 0x2104 , I2C_ITPENDINGBIT_ARBITRATIONLOSS = ( u16 ) 0x2102 , I2C_ITPENDINGBIT_BUSERROR = ( u16 ) 0x2101 }
I2C_ITPendingBit_TypeDef ;
typedef enum {
    I2C_EVENT_SLAVE_ADDRESS_MATCHED = ( u16 ) 0x0702 , I2C_EVENT_SLAVE_BYTE_RECEIVED = ( u16 ) 0x0740 , I2C_EVENT_SLAVE_BYTE_TRANSMITTED = ( u16 ) 0x0780 , I2C_EVENT_SLAVE_ACK_FAILURE = ( u16 ) 0x0804 , I2C_EVENT_SLAVE_STOP_DETECTED = ( u16 ) 0x0710 , I2C_EVENT_MASTER_START_SENT = ( u16 ) 0x1701 , I2C_EVENT_MASTER_ADDRESS_ACKED = ( u16 ) 0x1702 , I2C_EVENT_MASTER_BYTE_RECEIVED = ( u16 ) 0x1740 , I2C_EVENT_MASTER_BYTE_TRANSMITTING = ( u16 ) 0x1780 , I2C_EVENT_MASTER_BYTE_TRANSMITTED = ( u16 ) 0x1784 , I2C_EVENT_MASTER_HEADER_ACKED = ( u16 ) 0x1708 }
I2C_Event_TypeDef ;
void I2C_DeInit ( void ) ;
void I2C_Init ( u32 OutputClockFrequencyHz , u16 OwnAddress , I2C_DutyCycle_TypeDef DutyCycle , I2C_Ack_TypeDef Ack , I2C_AddMode_TypeDef AddMode , u8 InputClockFrequencyMHz ) ;
void I2C_Cmd ( FunctionalState NewState ) ;
void I2C_GeneralCallCmd ( FunctionalState NewState ) ;
void I2C_GenerateSTART ( FunctionalState NewState ) ;
void I2C_GenerateSTOP ( FunctionalState NewState ) ;
void I2C_SoftwareResetCmd ( FunctionalState NewState ) ;
void I2C_StretchClockCmd ( FunctionalState NewState ) ;
void I2C_AcknowledgeConfig ( I2C_Ack_TypeDef Ack ) ;
void I2C_FastModeDutyCycleConfig ( I2C_DutyCycle_TypeDef DutyCycle ) ;
void I2C_ITConfig ( I2C_IT_TypeDef ITName , FunctionalState NewState ) ;
ErrorStatus I2C_CheckEvent ( I2C_Event_TypeDef I2C_Event ) ;
u8 I2C_ReceiveData ( void ) ;
void I2C_Send7bitAddress ( u8 Address , I2C_Direction_TypeDef Direction ) ;
void I2C_SendData ( u8 Data ) ;
FlagStatus I2C_GetFlagStatus ( I2C_Flag_TypeDef Flag ) ;
void I2C_ClearFlag ( I2C_Flag_TypeDef Flag ) ;
ITStatus I2C_GetITStatus ( I2C_ITPendingBit_TypeDef ITPendingBit ) ;
void I2C_ClearITPendingBit ( I2C_ITPendingBit_TypeDef ITPendingBit ) ;
typedef void ( * _fctptr_t ) ( void ) ;
extern void _halt_ ( void ) reentrant ;
extern void _jmp_ ( _fctptr_t Addr ) reentrant ;
extern void _nop_ ( void ) reentrant ;
extern void _rim_ ( void ) reentrant ;
extern void _sim_ ( void ) reentrant ;
extern void _trap_ ( void ) reentrant ;
extern void _wfe_ ( void ) reentrant ;
extern void _wfi_ ( void ) reentrant ;
extern unsigned char _getCC_ ( void ) reentrant ;
extern void _setCC_ ( unsigned char Value ) reentrant ;
extern unsigned int _getSP_ ( void ) reentrant ;
extern void _setSP_ ( unsigned int newsp ) reentrant ;
extern unsigned int _swapbyte_ ( unsigned int Value ) reentrant ;
extern unsigned char _swapnibble_ ( unsigned char Value ) reentrant ;
u8 Dimmer_val = 0x0 ;
void main ( void ) {
    GPIO_Init ( ( ( ( GPIO_TypeDef * ) 0x5005 ) ) , ( ( GPIO_PIN_2 ) | ( GPIO_PIN_1 ) ) , GPIO_MODE_OUT_PP_LOW_FAST ) ;
    GPIO_Init ( ( ( ( GPIO_TypeDef * ) 0x5005 ) ) , ( GPIO_PIN_3 ) , GPIO_MODE_IN_PU_NO_IT ) ;
    while ( 1 ) {
        Dimmer_val = GPIO_ReadInputPin ( ( ( ( GPIO_TypeDef * ) 0x5005 ) ) , ( GPIO_PIN_3 ) ) ;
        if ( Dimmer_val == 1 ) {
            GPIO_WriteHigh ( ( ( ( GPIO_TypeDef * ) 0x5005 ) ) , ( GPIO_PIN_2 ) | ( GPIO_PIN_1 ) ) ;
            }
        else {
            GPIO_WriteLow ( ( ( ( GPIO_TypeDef * ) 0x5005 ) ) , ( GPIO_PIN_2 ) | ( GPIO_PIN_1 ) ) ;
            }
        }
    }

Let me know how to make it compiled w/o errors. By the way, what's the preprocess file used for ?

Thanks,
+1
0
-1
November 9, 2009 - 6:09pm
Raisonance Support Team

Hi Snake,

Sorry for the delay in the response.
You need to register your RKit-STM8, which will give you access to 16KB of code. The free (unregistered) version is not large enough to compile stm8_tim1.c

Registration is free from the Raisonance web site.

BTW, we often ask for preprocessed source files so that we can reproduce customer problems without any interference with their .h files, include path or the like...

Regards,
Bruno
+1
0
-1
November 11, 2009 - 4:55am
Guest

Thanks a lot Bruno,

I registered and got the activation code, compiled and it's errors free now.

Thanks again for all the support.