The registers are stacked when PSW (register bank index) is not modified, i.e. when the "using N" attribute is not specified.
The best solution often consists in associating one bank of registers to one priority level of interrupts. Typically, for the devices with 2 priority levels, 3 banks are needed (one for the "main" level, and two for the interrupts.

When using #pragma ASM/ENDASM, the assembly code is not analysed, and RC51 will consider that all registers are potentially modified (as when calling an external function). But the use of the "using N" attribute is always the best solution.

Thanks. I didn't think of switching banks. That will work fine.

Steven Pruzina

Me either...
Normally the RC51 works as follows if i declare the following line in C:

void SerialInt(void) interrupt 4
{
...
}

In ASM the code looks as follows:

0023 push ...
002x push ...
002x push ...
00xx ...
003x pop ...
003x pop ..
003x pop ...
003x reti

But i would like to have an option (like SDCC has), where iam able to say the code looks as follows:

void SerialInt(void) interrupt 4 sampleoption
{
...
}

This option make RC51 to generate only the following code:

0023 RETI

I want to have the possibility to handle the code in the interupts as i want. Because in some applications i know exactly which registers i need to store and what i want to do....
When writing a flashloader and you define a redirectable interrupt, RC51 will push/pop always (independently of the infact used registers) everything he could use. RC51 stores then: ACC, PSW, DPTR, R1...R8. That makes 24 instructions (PUSH and POP instructions)...

at 0x08 data ISR_Redirect = 0x00;

void MasterISR(void) interrupt 4
{
if (!ISR_Redirect)
{
asm{0x12} // lcall
asm{ISR_04_RAPP_ASM}
} else
{
asm{0x12} // lcall
asm{ISR_04_RFLA_ASM}
}
}

Kind regards,
Soeren