Topic : Configure STM8S903 for Timer6 auto reload

Forum : ST7/STM8

Original Post
Post Information Post
March 31, 2012 - 7:12am
Guest

Hi,

I am new to RIDE IDE and want start an application with IDE and Raisonance Tool-chain of 32K free compiler.

I Configured it to start application, for 16 MHz internal oscillator and want use Timer6 as basic time base for my application.

I configured it with all expected configuration, however I could not able to trigger the Interrupt for this timer.
Even I could not see increment in counter register too.

Please help me to start interrupt.

Or list the sequence of register filling to start that.

void TimerInterrupt__Initialize(void)
{
unsigned char temp;
TIM6_CR2 = 0x10; // No Sync
TIM6_SMCR = 0x00; //
TIM6_IER = 0x00;
TIM6_ARR = 125; // To Generate 250 micro sec Interrupt
TIM6_CNTR = 125;
TIM6_PSCR = 0x01; // Prescalar = 32 for 16 MHz F_Master Time base = 2 micro
TIM6_IER = 0x01;
TIM6_CR1 = 0x81; //
// TIM6_EGR = 0x01;
temp = TIM6_CNTR;

}

Also please add / suggest if I missed something.

Thanks in advance.
Replies
Post Information Post
+1
0
-1
April 2, 2012 - 10:58am
Raisonance Support Team

Hi,

You just need to write the Timer6 interrupt handler as follows:

void TIM6_UPD_OVF_TRG_IRQHandler(void) interrupt 23
{
    // Your code goes here
    ...
    // Clear interrupt pending bit (bit 0)
    TIM6_CR1 &= 0xFE

}

Not tested, but you have the idea!
+1
0
-1
April 11, 2012 - 5:00pm
Guest

I missed to write that, I am using Ride7 STM8 Simulator.

and I could not see any updates in TIM_CNTR.

Am i missing something?
+1
0
-1
April 21, 2012 - 5:33pm
Guest

Hi Bruno,

can you help to start TIM6 CNTR in simulator mode of RIDE7?

Thanks in advance
+1
0
-1
April 23, 2012 - 2:28pm
Raisonance Support Team

Hi Mantug,

Our ARM simulator is a core simulator. This means it properly simulates the opcodes. However, interrupts, exceptions and peripherals are *not* simulated.
Hence it is not possible to have the TIM6 counter work in simulator mode.

This is mostly because:
- It is very difficult to properly simulate peripherals, and each subfamily has its own specificities.
- "Live" programming and debugging is so easy and efficient with Cortex devices that hardware debug is most often easier than simulation.

Sorry for the inconvenience.
Best Regards,
+1
0
-1
May 1, 2012 - 8:34am
Guest

Bruno wrote:
Hi Mantug,

Our ARM simulator is a core simulator. This means it properly simulates the opcodes. However, interrupts, exceptions and peripherals are *not* simulated.
Hence it is not possible to have the TIM6 counter work in simulator mode.

This is mostly because:
- It is very difficult to properly simulate peripherals, and each subfamily has its own specificities.
- "Live" programming and debugging is so easy and efficient with Cortex devices that hardware debug is most often easier than simulation.

Sorry for the inconvenience.
Best Regards,

Thanks Bruno.
Along with, do you suggest me some other tool which is capable to simulate STM8 without hardware?