Topic : STR710Fz2: Together Uart Tx & timer OCMPA interrupts are not working

Forum : ARM

Original Post
Post Information Post
June 27, 2007 - 2:55pm
Guest

Hi,
I have enabled UART3 for transmitting some debugging messages to PC using TxEmpty interrupt & Timer 1 for generating 1 ms interrupt in OCMPA mode.

I have RIDE(BN746-st7-ARM-8051-P1-STR750), ARM tool chain ver 1.1.15
RFlasher ver 6.10.22
Booting from Flash

If I enable only UART interrupt, it works fine.
If I enable only timer interrupt, works fine.
If I enable both, then, i may receive one or 2 strings & system(uC side) hangs. I am putting code of file main.c & 71x_it.c. Please open them in some nice editor.

Please look into this & suggest something as I will be enabling many other interrupts in future. As I dont have debugger version compiler, I am in blank.

Thanks in advance
Pratibha

main.c

InitDevice()
{
   // clock is configured for 48 mHz
   // GOPIO is set for Push Pull o/p mode

   // for UARTs tr pins
   GPIO_Config(GPIO0, UART3_Tx_Pin, GPIO_AF_PP);
   GPIO_Config(GPIO0, UART3_Rx_Pin, GPIO_IN_TRI_CMOS);

   // Configure the UART X      // ST's      @9600 
                // BR    10 bytes data + others 7  need 18mS
   UART_OnOffConfig(UART3, ENABLE);      // Turn UART0 on
   UART_FifoConfig (UART3, DISABLE);      // Disable FIFOs
   UART_FifoReset  (UART3 , UART_RxFIFO);   // Reset the UART_RxFIFO
   UART_FifoReset  (UART3 , UART_TxFIFO);   // Reset the UART_TxFIFO
   UART_LoopBackConfig(UART3 , DISABLE);   // Disable Loop Back   - BR 9600 Bps, No parity, 8 data bits, 1 stop bit 
   UART_Config(UART3, 19200, UART_NO_PARITY, UART_1_StopBits, UARTM_8D);   // for internal clock it works up to 9600 BR only
   UART_RxConfig(UART3 ,ENABLE);         // Enable Rx

   // Configure the TIM1
   TIM_ITConfig ( TIM1, TIM_OCA_IT, ENABLE );   // Enable the Output Compare for the TIM1 peripheral
   EIC_IRQChannelPriorityConfig( T1TIMI_IRQChannel, 2);
   EIC_IRQChannelConfig( T1TIMI_IRQChannel, ENABLE );

   //1000Hz = 1mS = count = (( 48Mhz / 1 ) / 48000 ) - 2;
   TIM_Init (TIM1);
   TIM_PrescalerConfig ( TIM1, 0x01);      // Configure the TIM Prescaler
   TIM_OCMPModeConfig ( TIM1, TIM_CHANNEL_A, 0x8000, TIM_TIMING, TIM_HIGH );

   EIC_Init();

   EIC_IRQChannelPriorityConfig(UART3_IRQChannel,1);
   EIC_IRQChannelConfig(UART3_IRQChannel, ENABLE);

   UART_ItConfig(UART3, UART_RxBufFull,   ENABLE);
   UART_ItConfig(UART3, UART_TxEmpty,      ENABLE);

   EIC_IRQConfig( ENABLE );   //Enables or Disables the selected IRQ channel interrupts.
}

void TxData(char command, char *str, u16 len)
{
int      i, k;
char   C = 'A';
char   len_lsb, len_msb, crc_msb, crc_lsb;

   if(len < 0)               return;
   
UART_ItConfig(UART3, UART_TxEmpty,   DISABLE);

   crc_msb = crc_lsb = 0;
   
   len_msb = len & 0xff00;
   len_msb >>= 8;
   len_lsb = len & 0x00ff;

   // '*'
   TxBuf[WriteIndex++] = '*';         ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;

   // device id = 1
   TxBuf[WriteIndex++] = 1;         ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;

   // first command
   TxBuf[WriteIndex++] = command;      ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;

   // second len_msb
   TxBuf[WriteIndex++] = len_msb;      ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;
   
   // second len_lsb
   TxBuf[WriteIndex++] = len_lsb;      ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;

   // then data
   for(i=0; i TxBufLen)
            WriteIndex = 0;
   }

   // crc msb lsb
   TxBuf[WriteIndex++] = crc_msb;      ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;
   TxBuf[WriteIndex++] = crc_lsb;      ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;

   // #
   TxBuf[WriteIndex++] = '#';         ToBeTransmitted++;
   if(WriteIndex > TxBufLen)
         WriteIndex = 0;



transmit:   ;   // initiate transmission if Tx register is empty : Dont Wait,   while(!((UART_FlagStatus(UART3)) & UART_TxEmpty));

   if((UART_FlagStatus(UART3)) & UART_TxEmpty)
   {
// NOTE..
   // enable Tx interrupt whenever TxBuf has got some data. IRQ will Disable this, 
   // as this interrupt comes continuously..
      
   UART_ItConfig(UART3, UART_TxEmpty,   ENABLE);
   
   }
}

void   delay_ms(int ms_count)
{
   OneMsCounter = 0;

   while(OneMsCounter < ms_count)
   {
      delay(10);
   }
   
}

int main(void)
{
   InitDevice();
   for(i=0; i<10; i++)
   {
      TxData(CMD_STR, com_data, 10);
      delay_ms(100);
   }
   GPIO_BitWrite(GPIO1, 3, 0);
   GPIO_BitWrite(GPIO1, 5, 0);

   while(1);
}

71x_it.c

void UART3_IRQHandler(void)
{
u8   UARTStatus, bRByte;

   Status = UART_FlagStatus(UART3);
    if((Status & 0x0001) != 0)
   {
      UARTStatus = UART_ByteReceive(UART3, &bRByte, 0xFF);
   }
   // Transmit interrupt. Status Reg bit is set.
   if((Status & 0x0002) != 0)
   {
      if(ToBeTransmitted > 0)
      {
         UART3->TxBUFR = TxBuf[ReadIndex++];
         ToBeTransmitted--;
         if(ReadIndex > TxBufLen)   ReadIndex = 0;
      }
      // disable TxEmpty interrupt
      else
         UART_ItConfig(UART3, UART_TxEmpty,   DISABLE);
   }
}


void T1TIMI_IRQHandler(void)
{
u16      status;
u16      _SR;
static int   data = 1;

   _SR = TIM1->SR;
   if((_SR & 0x4000) == 0x4000)
   {
      TIM1->OCAR += 0x8000;      // interrupt delay   // 0xBB80 for 1000Hz

      GPIO1->PD = ~GPIO1->PD;
      TIM1->SR = ~(0x4000);   // Clear Intr flag
   }
}