Hi Vincent,
clock speed is not critical for any of our current projects - we were just familiarising ourselves with the software.

One of my colleagues has found another small bug. When programming STM32 with cortex_pgm, Verify does not work when the device is protected but errorlevel returns 0.

Programming the option bytes alone is not supported so it is not possible to Program, Verify, Write option bytes then Verify option bytes.

Here is a screen dump of a session:-

c:\Program Files\Raisonance\Ride\Bin>Cortex_pgm.exe TSTM32F101C6T6 O01,FF,FFFFFFFF E PV2.hex VV2.hex
Cortex_pgm: software for programming Cortex chips using a RLink as master.
Copyright Raisonance 2007.

(0)
Selecting target: STM32F101C6T6...
(0)
Option Bytes: RDP=Protected, USER=0xFF, WRP=FFFFFFFF
(0)
Connecting to RLink... OK
Connecting to target... OK
Reading target IdCode... OK
IdCode read: 0x3BA00477
Silicon Revision Id: 0x20016410.
Option bytes: RDP=0xA5, USER=0xFF, WRP=0xFFFFFFFF
Device initialization... OK

(5)

Erasing flash... OK

Erasing Option Bytes... OK

(10)
Programming file V2.hex to flash... OK

Programming Option Bytes... OK

(18)
Verifying flash against file V2.hex ... OK
Flash content differs from file.

(21)
Closing com with RLink... OK
c:\Program Files\Raisonance\Ride\Bin>echo %errorlevel%
0

c:\Program Files\Raisonance\Ride\Bin>

Best regards

Damon

Hi,

The current official version cannot verify when setting the protection.

This has been corrected here some time ago, but will only be available in the next release of RIDE for 'normal customers'.

I can send you a test version, but a number of other major things have changed (SWD support, option F, etc.) that might have introduced problems and we haven't finished the basic validation, so it will take a few days.

Best Regards,

Vincent

Hi Vincent

I would be happy to help test your latest version.

Best regards

Damon

Hi Vincent,

Any news on the update?

Best regards

Damon

Hi,

Sorry for the delay. I was very busy validating things for the next release of Ride.
The good news is that you should soon have an official version with all the fixes we made 'for you'. ;)

Here is the test version:
ftp://www.raisonance.com/temp/ST/fix_Cortex_pgm_verif_protect_081028.zip

Note that it will use SWD by default. (that is, unless you specify a JTAG chain)
You can use SWD through the JTAG connector without any hardware change, and in fact it should even be faster.
(and no more concerns about clock speeds)
But if you experience problems with SWD, you can try to declare a JTAG chain with zero devices before and after the STM32. That will make it switch back to JTAG.

Please let me know how it goes.

Best Regards,

Vincent

Hi Vincent,

preliminary testing has revealed a problem. It is not possible to erase a chip once it has been programmed. I understand that by omitting the 'O' switch the software should restore the option bytes to default (unlocking the chip). It looks as though the option bytes are not reset before programming causing a program/verify error. Apart from this it looks good so far.

Best regards

Damon

Hi,

Thanks for the testing.

Please give a try at these files:
ftp://www.raisonance.com/temp/ST/fix_Cortex_pgm_verif_protect_081028_2.zip

Best Regards,

Vincent