Forum : ARM
Original Post
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September 14, 2010 - 1:30pm
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hello, i want to use RLink Pro (with JTAG-SWD Connector) to programm an stm32f103RB on my own PCB. At the moment i'm working out that PCB. my question is does any signal of the JTAG-SWD connector (TDI, TMS, TCK or TDO) need a Pull-Up resistor? |
Hi,
The RLink already includes 4K7 pullup resistors on all its IOs.
But you can put pullup resistors (not too strong, 10K is fine) on your board too, for when the RLink is not plugged.
(depends on your application)
There is one very important thing to note: the RST and TRST signals are required too.
(they are different and should not be connected to each other.)
In case of RST, you very probably need a pullup resistor for when the RLink is not there.
And of course GND and VCC are required too.
VCC is for powering the RLink IOs from the target board. (your board)
Best Regards,
Vincent
thank you for your fast answer!
so i better put pullup resistors because RLink won't be plugged in! i checked RST and TRST, thanks for that info.
thanks a lot
greetings Sebastian
Hi.
One guestion: does Rlink need NRST (STMF105) signal to be connected for debugging and programming ? I thought that Rlink (SWD mode) need only VC, GND, SWCLK i SWIO...
Is it correct ?
What pins are necessary to debug and program (also in production) STM32F105 device using Ride-7 ?
Hi,
Yes, NRST is required in SWD. (and in JTAG too of course)
This is clearly stated here:
http://forum.raisonance.com/viewtopic.php?id=2449
Please tell me what made you think that RLink does not require this signal. If we have a doc saying this, we must correct it as soon as possible!
The reason is, there are some situations where the device can get locked, (application disabling JTAG, protections or other things) and these situation can (and quite often do) happen by accident, and the only way out of them is to use NRST. So Raisonance cannot guarantee proper operation without this signal.
This is not specified by the ARM doc because these situations are dependent on the manufacturer (ST, TI, etc.) and device (STM32F1xx, STM32F2xx, etc.) but not from the core. However, as it happens, it applies to all the ARM CPUs at which we looked. (differently, depending on the IO pads, Flash memory, boot circuitry, etc.) I don't know all ARM CPUs, but don't think there will ever exist a CPU that is an exception to this, because they all include some sort of protection.
The connection of TRST to RLink can be omitted in some cases but this signal, when it gets out of the CPU, must also NOT be tied low by other components, as it would prevent debugging and programming from operating: it resets the JTAG/SWD part of the CPU!
Of course it MUST NOT be connected to NRST, as the RLink must be able to communicate on JTAG/SWD while NRST is tied low.
Best Regards,
Vincent
Well, I found it in application note AN2586 page 18 ("STM32F10xxx hardware development") (app date October 2010).
There is Table 2 - Debug port pin assignment. For SW debug port, there are assigments only for PA13 and PA14 (SWDIO and SWCLK respectively), others are used only for JTAG debug port.
And here:
4.2
SWJ debug port (serial wire and JTAG)
The STM32F10xxx core integrates the serial wire / JTAG debug port (SWJ-DP). It is an
ARM® standard CoreSight™ debug port that combines a JTAG-DP (5-pin) interface and a
SW-DP (2-pin) interface.
? The JTAG debug port (JTAG-DP) provides a 5-pin standard JTAG interface to the AHPAP
port
? The serial wire debug port (SW-DP) provides a 2-pin (clock + data) interface to the
AHP-AP port
In the SWJ-DP, the two JTAG pins of the SW-DP are multiplexed with some of the five JTAG
pins of the JTAG-DP.
There is no info about connecting to reset when SW-DP is used.
So please tell me what exactly signals are nessesary for programming and debugging via SW-DP and where can I find it in docs.
with best regards,
xadamus
Hi,
For SWD you need GND, VCC, SWDCLK, SWDIO and NRST. That's 5 wires. (8 for JTAG)
TRST is special. (see my previous post)
As far as our tools are concerned, the official doc is this:
http://forum.raisonance.com/viewtopic.php?id=2449
The extracts you mention from the ST doc only describe the debug port from the point of view of the Cortex core, which is 5 pins for JTAG and 2 pins for SWD.
But _the_STM32_is_more_than_just_the_core_, and for complete operation (of the Flash in this case) you also need NRST. And of course GND and VCC that also don't appear in the extracts you mention, but you didn't try to remove them... ;)
In the same doc you will see figure 12 that shows 6 connections for JTAG, not 5. NRST is shown there, even though it is not mentionned in table 2, even for JTAG. This doc contains no equivalent of figure 12 for SWD, but if there was one it would show that NRST must be connected...
Best Regards,
Vincent