Topic : Breakpoints - how it is (esp. with cortex stm32f...)

Forum : ARM

Original Post
Post Information Post
February 21, 2011 - 5:27pm

I wonder...
The Cortex Stm32F.. core provides two hardware breakpoints - I am right?

So, what if I set more than these two? Then the code there is temporally exchanged with a jump? If "yes" how it influences (exhaust?) the flash reprogram limit (about 1000? or more) .
Does Ride use these hardware breakpoints?
May I not hesitate to use many breakpoints at the same times or it is better to set not more than these two to safe the flash health?

What policy you advice not to wear out the flash quickly?

Is there a difference when I debug in flash or RAM?

I am too careful?


Post Information Post
February 21, 2011 - 5:51pm
Raisonance Support Team


Cortex-M3 devices provide a number of hardware breakponits (HWB) that is usally larger than 2.
This number is 6 for STM32 and most others, not 2.

Ride does use these HWB for Flash addresses. If you request more than the available number you will receive an error message from the debugger. (I suggest you try it ;) )

Ride does not replace the code in Flash for breakpoints, both for performance and for flash reprogram limit reasons.
It does it when the breakpoint is on a RAM address. (even if some HWBs are left) This is one of the few good reasons to place some code in RAM: debugging with unlimited breakpoints.

One last interesting thing on this topic: HLL stepping (C stepping) requires setting breakpoints. (for stepping over a function for example) So you should try to refrain from using the 6 breakpoints and leave 2 or 3 for HLL debugging... if possible.

I hope it helps.

Best Regards,